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In this section, we will look at how to use library components provided by vendors to design circuit.

First, we need to download and import the library. Open muRata’s official website (https://www.murata.com/en-sg/tool/data/librarydata/library-keysight2), then scroll down and you will see the download option (or you can download it directly from the network disk https://pan.baidu.com/s/1uDFTf8nni8B6R3qluvteMw?pwd=2o9f):

Among them, there is Multilayer Ceramic Capacitor, which is divided into Dynamic model and Static model. There is also Inductor, which is divided into Power inductor (dynamic model) and RF inductor (static model). For convenience, we download them all.

Then as mentioned in the previous section, we put the libraries into a specific folder, unzip them, and import them using Design Kit:

The ones with “EIA” are static models.

We then use “Copy Cell” to copy Design1 to “Design1_Murata”:

Click “OK” and open the copied schematic. At this point, we can see the component library we imported in the Library Palettes on the left, and we select “muRata Components”:

In this experiment, according to the original author’s design, the capacitor selected is the “GJM03” series, and the inductor selected is the “LQG15HH_02” series. We enter “GJM03” in the search box, select it and put it into the schematic (we will not set the value yet, we will do it later).

Similarly, search for “LQG15HH_02”, select it and put it into schematic.

Next, we need to set the value of the imported component. Since the value we set before is optimized, the value it displays may not be correct. We double-click L4 and look for the component model closest to 34nH:

We select “LQG15H5G33NJ02” and can see that its inductance is 33nH, the tolerance is ±5%, the rated current is 350mA, and the frequency range is 50MHz to 20GHz.

Similarly, we select “LQG15HH82NJ02” for L5 and “LQG15HH47NJ02” for L6.

Then we replace the original inductor (you can move the text content to make the interface cleaner):

Similarly, we make similar modifications to the capacitors, selecting “GJM0335G2A220JB01” for C3 and “GJM0335G2A200JB01” for C4.

Save the design.

We open TestBench, disable the previous submodule, drag the newly created Design1_Murata into the schematic, and connect it:

Since we have already entered the simulation, we select “History – On” in the .dds file to turn on the history and save the previous simulation results on the original plot. At this time, we click Simulate in the toolbar and we can see that an error message appears:

This is because when using PDK, we only import the name of the component. We also need to select “muRataLibWeb_L Set Up” in the Library Palettes and choose to put in the external network list file; select “muRataLibWeb_C Set Up” to put in the external network list file.

Then perform simulation.

In the picture we can see the solid bold trace, which we can compare with the circuit built with ideal components.

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