Yield Analysis in ADS (8)
Previous: ADS Tutorial (VII) Monte Carlo Simulations
In the previous section, a Yield Analysis in ADS performed a Monte Carlo simulation to explore the impact of component tolerances on simulation results. However, we still do not know how many components meet our initial design requirements.
Therefore, we need to conduct Yield Analysis . Yield analysis is a method used to evaluate and optimize the manufacturing yield in electronic circuit design. It simulates various uncertainties in the manufacturing process and analyzes the changes in circuit performance under these uncertainties, thereby evaluating the yield that can be achieved in the actual manufacturing process.
We need to select the Monte Carlo controller in the main design, and then click 
Disable Monte Carlo Analysis in the toolbar. Then select “Optim/Stat/DOE” in the Library Palettes, select it 
, and put in the yield specification. Then select 
and put in the yield analysis controller.
First, let’s start by setting the specification. Double-click 
to open the editing window.
Let us first define the target parameters that need to be regulated, taking dB(S(2,1)) as an example:
Then select “SP1” for SimInstanceName. Since the unit is dB, set the minimum value to “-1”. When setting RangeVar, since the X-axis only represents frequency, set it to “freq”. Then set RangeMin to 0.01 GHz and RangeMax to 0.2 GHz.
Next, we need to define the parameters of the yield controller. Set NumIters to 250 (for demonstration purposes, this may be much higher in practice). Then we set SaveAllIterations to yes to save the results of all iterations.
Then, we need to design statistical methods for the parameters. Select “Simulate – Simulation Variables Setup”, then select the “Statistics” tab and check the parameters to be analyzed (this step has been introduced in detail in the previous tutorial and will not be repeated here).
Click “OK” and save the design. Then click 
Simulate, and you can see that the results of this simulation are very similar to those obtained by Monte Carlo simulation:
Then, we can choose to add a table. You can see that there are several more options. We add “Yield”, “NumFail” and “NumPass” to the table:
At this point, we can see that the yield is 99.6%, which means that almost all of the circuits with added losses that we analyzed have passed the test.
Similarly, we can use “Ctrl + C” and “Ctrl + V” to copy a Yield SPEC to analyze dB(S(1,1)). Since we don’t want too much return loss, we set the maximum value to -15dB:
After saving, execute the simulation again:
It can be seen that the yield rate has dropped to 29.6% at this time, indicating that many circuits have failed. From the upper left corner of the picture of the ancient temple, it can be seen that at low frequencies, due to component tolerances , the return loss of many circuits is greater than -15dB.
Then, to analyze the transmit response, we disable the second Yield SPEC and duplicate the first Yield SPEC, set the Max to -25, and then change the frequency range to 0.35 GHz to 0.5 GHz.
Right now we are just checking the transmission response. Performing a simulation, we can see that while we have decent performance at low frequencies, the yield is still compromised due to component tolerances:
If we change the maximum value constraint to -20 and perform simulation again, we can see that the yield has become 100%, indicating that all designs have met the requirements.
In short, yield analysis allows us to more intuitively see the design of the circuit when considering component tolerances. At the same time, we can also use other data to analyze which components are more sensitive to tolerances, which helps us better carry out subsequent designs .
(To be continued……)
